CPU Card: Revision A

Last Updated: October 31, 2005 11:13:27 AM


Revision A of the CPU card had a few mistakes and required some creative pin lifting, double socketing and rewiring to get it working. The bottom connector provides signals to the 1861/keyboard card that are not available on the standard system bus. The upper connector supports Front Panel functionality, again it provides signals not available on the bus. The complete system does not require a front panel to operate. This card replaces System-4 CPU card.


The CPU card has several separate subsystems; clock generation, mode control, power on reset/run, address demultiplexing/decoding , 4K EPROM, and reset address remapping. The CPU card also has auxiliary connectors required for a full function front panel and an 1861 based video/keyboard system. Jumper blocks select -EF line mapping for the bus EF line, front panel EF line, 1861 Video EF and keyboard input EF line. Another set of jumpers selects the location of the EPROM within the address space. The last jumper block (VMA) determines if/how the address is remapped during reset from 0x0000 to the location occupied by the on board EPROM within the address space. See the operational description for details.

Issues/todo log

Date Description Status
Jan. 2005 SV6 pin 8 should be -reset not -run.

74LS123 should use Q (pin 13), not -Q (pin 4) to IC6
Gate A (PIn 1). 74LS123 CLR (Pin 3) should be tied
high, A (Pin 1) to 1232 RST (Pin 5)

1232 -ST (Pin 7) should be tied to 1802 Clock out (Pin
39) not to TPA.

74LS74 tie PRE (Pin 10) and D (Pin 12) high. CLK (pin
11) should be connected to A15 not GND.



Rev. A

Rev. B

Jan. 2005 VMA, Boot/Remap silk screen entry touches pad Done Rev. B
Mar. 8/2005 Add jumper to disable automatic run after power on reset Done Rev. B

Schematics, board layout, and operational description

Revision Production Date Schematic Layout Operational Description
A Jan. 11/05 cpu2-a.sch cpu2-a.brd Rev. A ops notes
B Current Development Board
cpu2-b.sch cpu2-b.brd Rev. B ops notes