YACC1 – Basic Architecture

Here is a first guess at the architecture of the YACC 1

 

Four general purpose 8-bit registers R0-R3

8-bit Accumulator

8-bit Program Counter

256 bytes x 8 bits memory

256 I/O locations

All Instructions are either 8 bits long with immediate and direct addressing modes requiring a 2nd 8-bits

CPU.002